1. Field of the Invention
This invention relates to an electronic device package and an electronic equipment.
Priority is claimed on Japanese Patent Application No. 2005-204230, filed Jul. 13, 2005, Japanese Patent Application No. 2004-327710, filed Nov. 11, 2004, and Japanese Patent Application No. 2004-327711, filed Nov. 11, 2004, the contents of which are incorporated herein by reference.
2. Description of Related Art
Recently, starting with card-sized electronic equipment, various types of electronic equipment are becoming thinner and lighter. As electronic equipment become thinner and lighter, there is a demand for various types of electronic devices mounted thereon to be mounted in a thin state. Taking a silicon IC chip (semiconductor chip) as an example of an electronic device, it is recently becoming possible to cut away the rear face while it is in the silicon wafer state and form an ultra-thin IC chip having a thickness of less than 50 μm.
Conventional methods for electrically connecting such an electronic device to a substrate which it is mounted on include methods using anisotropic conductive materials (ACF and ACP) and methods using wire bonding (WB). However, in methods using anisotropic conductive materials, the anisotropic conductive material adds substantially 10 μm to 30 μm to the thickness, and accordingly increases the thickness of the electronic equipment and electronic components which the device is mounted on. Methods using wire boding require a space of more than 1 mm for extracting the wire, and consequently increase the thickness of the electronic equipment and electronic components which the device is mounted on.
Therefore, these conventional methods are insufficient for reducing the thickness and weight of the electronic equipment and their electronic components. In particular, when these methods are applied in the ultra-thin IC mentioned above, there is a danger that ultrasonic waves and pressure when connecting may destroy the ultra-thin IC chip and reduce the reliability of the connection.
Against such a background, conventional mounting methods have been proposed for using an elastic conductive member to electrically connect terminals and increase the reliability of the connection structure (see for example Japanese Unexamined Patent Application, First Publication No. 2001-230001).
However, the conventional mounting method described in the above Patent Application is not sufficiently resistant to bending of the electronic device package, and consequently has a problem of poor reliability when used repeatedly.
When the thickness of an IC chip is reduced to substantially 50 μm, in addition to the thickness of the chip itself, minute blemishes caused during the manufacturing process may damage the semiconductor chip. For these reasons, it is desirable to increase bend-resistance near the chip.